Sr. Technologist
Posted on Oct 7, 2024 by Western Digital
Fremont, CA
Other
Immediate Start
Annual Salary
Full-Time
Job Description
ESSENTIAL DUTIES AND RESPONSIBILITIES: Technology leader on wafer process integration to build a new reader structure for magnetic recording head development. Design and architect integrated wafer processes/flow for next generation magnetic read head by utilizing material/wafer fabrication, characterization, and data analysis knowledge. Work closely with module engineering teams to develop processes in critical building blocks and validate process scheme to ensure it satisfying both design and manufacturing robustness needs. Interface with Design/Program teams to understand device performance requirements; and define physical metrics in wafer processes that fulfill such requirements. Pull and analyze data from inline wafer and backend database; establish inline processes to backend performance correlation and build prediction model; identify the process optimization opportunities and set up DOE to drive the improvement activities. Troubleshoot the defect and performance failure related to wafer process/integration and provide process solutions in timely manner. Work closely with sister site process/integration teams for process transfer and product matching. Manage and control inline wafer WIP; set up process disposition route for product and process development; Maintaining or creating detailed documentation of product/process information.
ESSENTIAL DUTIES AND RESPONSIBILITIES: Technology leader on wafer process integration to build a new reader structure for magnetic recording head development. Design and architect integrated wafer processes/flow for next generation magnetic read head by utilizing material/wafer fabrication, characterization, and data analysis knowledge. Work closely with module engineering teams to develop processes in critical building blocks and validate process scheme to ensure it satisfying both design and manufacturing robustness needs. Interface with Design/Program teams to understand device performance requirements; and define physical metrics in wafer processes that fulfill such requirements. Pull and analyze data from inline wafer and backend database; establish inline processes to backend performance correlation and build prediction model; identify the process optimization opportunities and set up DOE to drive the improvement activities. Troubleshoot the defect and performance failure related to wafer process/integration and provide process solutions in timely manner. Work closely with sister site process/integration teams for process transfer and product matching. Manage and control inline wafer WIP; set up process disposition route for product and process development; Maintaining or creating detailed documentation of product/process information.
Reference: 201737638
https://jobs.careeraddict.com/post/95842371
Sr. Technologist
Posted on Oct 7, 2024 by Western Digital
Fremont, CA
Other
Immediate Start
Annual Salary
Full-Time
Job Description
ESSENTIAL DUTIES AND RESPONSIBILITIES: Technology leader on wafer process integration to build a new reader structure for magnetic recording head development. Design and architect integrated wafer processes/flow for next generation magnetic read head by utilizing material/wafer fabrication, characterization, and data analysis knowledge. Work closely with module engineering teams to develop processes in critical building blocks and validate process scheme to ensure it satisfying both design and manufacturing robustness needs. Interface with Design/Program teams to understand device performance requirements; and define physical metrics in wafer processes that fulfill such requirements. Pull and analyze data from inline wafer and backend database; establish inline processes to backend performance correlation and build prediction model; identify the process optimization opportunities and set up DOE to drive the improvement activities. Troubleshoot the defect and performance failure related to wafer process/integration and provide process solutions in timely manner. Work closely with sister site process/integration teams for process transfer and product matching. Manage and control inline wafer WIP; set up process disposition route for product and process development; Maintaining or creating detailed documentation of product/process information.
ESSENTIAL DUTIES AND RESPONSIBILITIES: Technology leader on wafer process integration to build a new reader structure for magnetic recording head development. Design and architect integrated wafer processes/flow for next generation magnetic read head by utilizing material/wafer fabrication, characterization, and data analysis knowledge. Work closely with module engineering teams to develop processes in critical building blocks and validate process scheme to ensure it satisfying both design and manufacturing robustness needs. Interface with Design/Program teams to understand device performance requirements; and define physical metrics in wafer processes that fulfill such requirements. Pull and analyze data from inline wafer and backend database; establish inline processes to backend performance correlation and build prediction model; identify the process optimization opportunities and set up DOE to drive the improvement activities. Troubleshoot the defect and performance failure related to wafer process/integration and provide process solutions in timely manner. Work closely with sister site process/integration teams for process transfer and product matching. Manage and control inline wafer WIP; set up process disposition route for product and process development; Maintaining or creating detailed documentation of product/process information.
Reference: 201737638
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