ASIC Verification Engineer
Posted on Feb 3, 2019 by Greenwaves Technologies
Greenwaves Technologies is a 19 people, 4 year old fabless semiconductor startup established near-by Grenoble, France. Our first product GAP8 is a 1+8 RISC-V core based IoT Application Processor armed with a high performance HW convolution engine. It is a simple yet very sophisticated unique processor architecture, which delivers an energy efficiency that is 20x better than the state-of-the-art, opening up a large range of battery powered applications. Examples of applications are people counting, keyword spotting, combined with beamforming, object recognition, face detection and vibration analysis. GAP8 is especially effective on machine learning inference algorithms (CNN, SVM, Bayesian, Boosting, Cepstral analysis). Yet, GAP8 is by and large programmed just like a regular MCU. We develop some reference applications to provide evidences of GAP8 performances. This could accelerate our potential customers' evaluation and decision process, but also drive some customers to adapt those applications for their own needs. Our SW development team works closely with the customers. GAP8 came out of fab in Feb 2018. We have sold so far more than 250 GAPuino development kits and yes, we are enjoying a nice commercial traction globally.
We, as a growing and highly multicultural team with sharp personalities, need talented, enthusiastic, curious and committed people who will be ready to bring energy into the system for a significant contribution to the success of the team project. Greenwaves Technology as a team is very proud of its specific collaborative management style. Our Technology is very much ahead of the state-of-art, and our chip is just about to prove its revolutionary potential on a wide opened global market. For a team, it is a very motivating challenge that each of us has the opportunity to be part of in proportion to one's own enthusiasm at work. The company is and will be what we each of us make of it, as we experience everyday. We are looking for an ASIC Verification Engineer that would be involved in HW design team to work on GAP8 next generations verification process.
- Verification of the design, architecture and micro-architecture of GAP8 SoC using advanced verification methodologies from specification, RTL simulation, gate level simulation, formal verification, assertion based verification to FPGA emulation
- Verification area covers functional items but also low power and performance
- Developing unit verification environments in system verilog (inc. UVM) for the constituent components of the chip
- Developing verification environment of the full GAP8 next generations chip
- Contributing to verification plan definition and enhancement
- Writing functional test cases to stimulate and verify all the features of the chip and its components
- Improving automation of the verification flow using EDA tools from Mentor (Questasim) and Cadence (Xcelium, Conformal)
- Putting in place a quantitative metric measurement approach to generate verification achievement reports
- Master Degree or plus in Electrical Engineering or Computer Engineering
- More than 2 to 5 years experience in ASIC design or verification
- Knowledge of verilog and/or system verilog. UVM is a plus. SV object oriented and TB structuring knowledge would be nice.
- Knowledge in software programming: C language is a must. Bash, TCL, Python would be appreciated.
- Passionate for debugging and strong problem solving
- Ability to work autonomously and proactively on tasks
- Work comfortably in an international environment, exchanging by email, message, telephone or conf-calls: Fluency in english is necessary.
- Strong team spirit and communication, happy to collaborate and share with colleagues, even remotely.
- Experiences in ASIC synthesis, Static timing analysis, equivalence checking, low power architecture, multi-clock domain architecture
- Signal processing (Image, voice, audio, vibration) experience
Employment type: Full - time ; CDI
Location : Villard Bonnot (near Grenoble, France)
Competitive compensation and stock option plan