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UVM Verification Contract

Posted on Nov 4, 2021 by IC Resources

Bristol, United Kingdom
Immediate Start
Annual Salary

IC Resources is working with global semiconductor company who are looking for a Verification engineer for 6-12 months, Contract inside IR35

Key skills and experience

  • IP Digital Verification Engineer with System Verilog UVM.
  • Familiarity with version management tools

Nice to have tool specific experiences in

  • Specman - Writing and debugging test-bench generation constraints
  • Incisive or Xcellium
  • VManager
  • Clearcase
  • Work as part of a team and implement parts of test bench using System Verilog UVM
  • Develop System Verilog models for complex arithmetic or logic operations, scoreboards, monitors
  • Efficiently debug SV model or c-model or RTL
  • Analyzing test regression fails, debugging and fixing existing code as well
  • Develop Efficient Coverage model and effectively close coverage targets

Reference: 1390255568

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